Direct Digital Synthesis (“DDS”) is a technique used to generate periodic signals where control over one or more signal properties is desired. Analog signals can be generated with the period and the wave shape controlled through DDS.
FIG. 1 shows a traditional DDS architecture with (DDS) 100 being used to generate a sine wave that is then converted to a two-valued clock. The DDS 100 receives an accumulator clock CLKACC and a digital input signal ΦInc indicating a phase increment. The DDS outputs an analog signal FOUT. The frequency of FOUT can be set by varying the frequency of CLKACC and/or varying the phase increment ΦInc.
In operation, accumulator 110 produces a new output value ΦAcc on each cycle of clock CLKACC. To produce each new value, the accumulator 110 adds ΦInc to its current contents. FIG. 2 shows a block diagram of an accumulator, such as is known in the art.
The value in accumulator 110 serves as a control input to Sine Unit 112. Sine Unit 112 converts each phase value ΦAcc into a corresponding amplitude value. In the illustration, the DDS signal generator is producing a sine wave. Accordingly, the amplitudes are related to the value ΦAcc by the function sin (ΦAcc). Sine Unit 112 might generate the required outputs using a math engine—a circuit configured to produce an output signal having a specific mathematical relationship to an input signal. Alternatively, it is possible to implement a sine unit by pre-computing the required output value for each value of the control input. These pre-computed output values are then stored in a memory at locations addressed by the control input. In operation, the control inputs are applied as addresses to the memory, resulting in the required output value of sin (ΦAcc) being read from the memory for each of ΦAcc applied as an input. Such a look-up table is shown in FIG. 3.
The output of sine unit 112 is periodic. Periodicity is achieved because of overflow in accumulator 110. The value stored in accumulator 110 increases (or decrease if negative values of ΦInc are used) for every cycle of CLKACC. Eventually, the value in accumulator 110 overflows (or underflows—if negative values of ΦInc are used). The full scale value of the accumulator is selected to correspond to a phase of 2pi radians. If the addition of ΦInc would cause the value of ΦAcc to exceed 2pi radians by an amount x, after the overflow, the accumulator stores only the value x. As a result, an overflow of the accumulator has the same effect as starting a new cycle of the periodic waveform, with the appropriate phase relationship maintained between the end of one cycle and the beginning of the next cycle.
The duration of one cycle of the waveform Fout can be controlled by altering the time it takes for accumulator 110 to overflow. This time can be controlled by changing the frequency of clock CLKACC. This time can also be controlled by changing the value of ΦInc.
Digital values representing sin (ΦAcc) are then fed to a digital to analog converter, such as DAC 114 which converts them to a quantized analog signal. Usually, a filter is attached to the output of the digital to analog converter to smooth out the quantized signal. Where a sine wave is required, the filter is likely a bandpass filter because a bandpass filter that includes the desired frequency of the sine wave in its pass band will increase the “spectral purity” of the signal.
If a digital signal, such as a clock, is desired, the analog signal may be fed to a comparator 118 to square off the signal. Thus, the DDS signal generator provides a convenient mechanism to generate a clock of controlled frequency. Where the DDS signal generator is being used to generate a clock, spectral purity is also important. Lack of spectral purity in the signal Fout appears as “jitter” in the digital clock. For precise measurement applications requiring a clock, low jitter is important. Therefore, it would be highly desirable to provide a DDS signal generator with high spectral purity.
One application where a variable frequency, but low jitter, clock is desirable is in automatic test equipment. FIG. 8 shows in greatly simplified form a block diagram of an automatic test system 800 of the type that might be used to test semiconductor chips. An example of such a system is the Tiger™ test system sold by Teradyne, Inc. of Boston, Mass., USA.
The test system includes a work station 810 that controls the test system 800. Work station 810 runs test programs that set up the hardware within tester body 812 and reads back results of tests. The work station also provides an interface to a human operator so that the operator can provide commands or data for testing a particular type of semiconductor device. For example a program running on work station 810 might change the frequency of a clock within the test system by changing the value of a register inside tester body 812 holding the value of ΦInc.
To fully test many types of devices, both analog and digital test signals must be generated and measured. Inside tester body 812 are digital “pins” 820 and analog instruments 818. Both are connected to the device under test 850. Digital pins are circuits that generate or measure digital signals or DC voltages and currents. In contrast, analog instruments generate and measure analog signals.
Pattern generator 816 provides control inputs to the digital pins 820 and the analog instruments 818. These control inputs define both the values and the time at which test signals should be generated or measured. To ensure an accurate test, the actions of the digital pins and the analog instruments often must be synchronized. Timing generator 814 provides timing signals that synchronize operation of the various components within tester body 812.
Automatic test equipment is made programmable so that it can test many different types of devices. It is often desirable to be able within automatic test equipment to generate a digital clock of a programmable frequency that has very low jitter. An example of such an application is called an arbitrary waveform generator (AWG). AWG 822 creates a waveform that can be programmed into an almost arbitrary shape using a clock of controllable frequency. In the prior art, a DDS signal generator 100 has been used as the clock for the AWG. The generated waveform would be more accurate if the clock provided to AWG had less jitter.
Automatic test equipment also sometimes contains an analog instrument called a digitizer. Digitizer 823 also relies on a clock, which should preferably be programmable. Digitizer 823 could also be made more accurate if it were provided with a clock with lower jitter.
More generally, there are many applications where sine waves of high spectral purity are desirable for testing devices such as semiconductor chips. It would therefore be desirable to provide automatic test equipment with an improved synthesizer circuit to generate signals with improved spectral purity.
We have recognized that the DAC strongly influences the overall spectral purity of signals produced by a DDS. We have also recognized that spectral purity strongly depends on the sampling rate at which the DAC operates. In particular, impurities arising from signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) decrease approximately linearly with DAC sampling rate. We have recognized the benefits of operating the DAC of a DDS at its highest possible sampling rate. However, as DACs with faster sampling rates become available, there are limitations on the availability of circuitry that can generate the data stream into the DAC. The circuitry needed to operate a DDS signal generator for high spectral purity is generally not available or undesirably expensive, consumes too much power, takes up too much space or is otherwise undesirable.